- 글번호
- 49074
- 작성일
- 2018.08.24
- 수정일
- 2019.04.25
- 작성자
- class
- 조회수
- 699
[2018] 2-Phase 3-Level ETSM With Mismatch-Free Duty Cycles Achieving 88.6% Peak Efficiency for a 20-MHz LTE RF Power Amplifier
2-Phase 3-Level ETSM With Mismatch-Free Duty Cycles Achieving 88.6% Peak Efficiency for a 20-MHz LTE RF Power Amplifier
This letter presents a 2-phase 3-level (2P3L) envelope tracking supply modulator (ETSM) for a long-term evolution 20 MHz (LTE20) radio frequency power amplifier as a solution for the ET system. This 2P3L ETSM that is composed of only switching converters achieves high efficiency, fast transient response, and a small output current ripple. To properly operate the proposed 2P3L ETSM, 4 pulse width modulatiop (PWM) signals with a 90° phase shift from each PWM signal are required without any mismatch between duty cycles. To remove the mismatch, a timedivision multiplexing comparator and a duty-cycle calibrator are proposed. Thanks to the proposed techniques, the proposed ETSM fabricated in 0.18-μm CMOS achieved the highest peak dynamic efficiency of 88.6% with an LTE20 signal, which is superior to the state-of-the-art systems.
Sine-Reference Band (SRB)-Controlled Average Current Technique for Phase-Cut Dimmable AC–DC Buck LED Lighting Driver Without Electrolytic Capacitor
This paper presents a phase-cut dimmable ac–dc buck LED driver for electrolytic capacitor-less LED lighting applications. In the driver, the sine-reference band (SRB)-controlled average current technique is proposed to perform rectified sine-average current control and phase-cut dimming control. The rectified sineaverage current control can regulate the average value of sine-wave LED current, maintaining a high power factor (PF) over a wide range of ac input voltage and output LED load. The phase-cut dimming control not only makes the LED driver compatible with two types of phase-cut dimmers, namely, leading-edge and trailingedge dimming types, but also eliminates visible dimming flicker at the ac line frequency. Fabricated in a 0.35 μm CMOS process, experimental results show the line regulation of ±2.36% over 90 to 260 VAC and the load regulation of ±0.65% within the load range of 10 to 36 LEDs. The PF exceeds 0.95 under all conditions, and the peak efficiency of 90.7% is achieved. The analysis of the flicker frequency verifies that the proposed dimmable LED driver completely eliminates visible flicker owing to the phase dimming variations without an output electrolytic capacitor.
Double Pile-Up Resonance nergy Harvesting Circuit for Piezoelectric and Thermoelectric Materials
This paper presents a double pile-up resonance energy harvesting circuit that efficiently and simultaneously extracts energy from a piezoelectric transducer (PZT) and a thermoelectric generator. The proposed harvester operates in a double pile-up mode (DPM) to efficiently extract energy from PZT with the enhanced damping force, resulting in a 1452% improvement in power extraction, which is the best performance among the state-of-the-art works. The harvester also operates in a boost converter mode (BCM) without an additional power switch, achieving 75% conversion efficiency at 450-μW output power. With a single-shared inductor, a simple control scheme enables the harvester to operate in both DPM and BCM by time-multiplexing method, consuming a low quiescent current of 240 nA. The prototype chip fabricated in a 0.18-μm BCD occupies an area of 1.5 mm × 1 mm, and it was tested with a 20-nF PZT product (PPA-1001) vibrated by a shaker (Type 4810).
A 10.1” 183-μW/electrode, 0.73-mm2/sensor High-SNR 3-D Hover Sensor Based on Enhanced Signal Refining and Fine Error Calibrating Techniques
A high-signal-to-noise ratio (SNR) inductor-free 3-D hover sensor is presented. This paper solved the low-signal component issue, which is the biggest problem in 3-D hover
sensing. For this purpose, we propose a power- and cost-effective high-voltage driving technique in the self-capacitance sensing scheme (SCSS) and lateral resolution optimization of a touch panel. In addition, the huge panel offsets in the SCSS from both vertical panel capacitance (CSV) and horizontal panel capacitance (CSH) can effectively be eliminated by exploiting the panel’s natural characteristics, without using other costly
resources. Therefore, in the proposed design, the total calibration block is minimized only for parasitic capacitance mismatches. Last, by adopting new driving scheme, two-phase simultaneous sensing is enabled to increase the SNR further. The proposed
hover sensing system achieved a 39-dB SNR at a 1-cm hover point under a 240-Hz scan rate condition in noise experiments, while consuming 183 μW/electrode and 0.73 mm2/sensor, which are the lowest power per electrode performance and the smallest
die-area per sensor performance, respectively, in comparison to the state-of-the-art 3-D hover systems.
- 구성원
- Sung-Wan Hong
- 학술지명
- IEEE Transactions on Power Electronics
- 권
- 33
- 시작 페이지
- 2815
- 게재년
- 2018
- 첨부파일